1. Field of the Invention
The present invention relates to a thin film transistor (TFT) array substrate and its fabrication method, and more particularly, to a TFT array substrate for a liquid crystal display and its fabrication method.
2. Discussion of the Related Art
In the conventional TFT liquid crystal display, liquid crystal is filled between a TFT array substrate (lower substrate) and a color filter (upper substrate). The lower substrate has a plurality of pixels vertically and horizontally arranged. A thin film transistor (TFT) is formed at each pixel as a switching device. A pixel electrode is coupled to the drain electrode of the TFT. A plurality of gate bus lines (gate lines) are formed in one direction and connected to the gate electrodes of the TFTs. A plurality of data bus lines (data lines) are formed in the other direction and connected to the channel electrodes.
On the upper substrate, color filters of red, green, and blue are formed in positions corresponding to the respective pixels of the lower substrate. A black matrix (light shielding layer) of chrome is formed in the regions between the color filters, i.e., the regions corresponding to the data bus lines, gate bus lines, and TFTs of the lower substrate. A protective layer is formed on the surfaces of the color filters and the black matrix. On the protective layer, a common electrode is formed so as to apply an electric field to liquid crystal located between the common electrode and the pixel electrodes.
In such a conventional liquid crystal display, the upper substrate has the black matrix. Therefore, in designing the size of the black matrix, the margins for possible misalignment between the upper and lower substrates must be taken into account. This results in a lower aperture ratio.
FIGS. 1A and 1B show another example of a TFT array substrate (lower substrate) of a liquid crystal display. In this case, the black matrix and the color filter, which were formed on the upper substrate above, are formed on the lower substrate. A gate electrode 11-1 and a gate bus line 11-2 are formed on a substrate 10. A gate insulating layer 12 is formed on the gate bus line. An island-shape active layer 13 is formed on the gate insulating layer 12 over the gate electrode 11-1. An ohmic contact layer 14 such as a doped semiconductor layer is formed on separate regions of the active layer 13. A source electrode 16-1 and a drain electrode 17 are formed on the ohmic contact layer 14. A data bus line 16-2 crossing over the gate bus line 11-2 is connected to the source electrode 16-1 of the TFT. A pixel electrode 15 connected to the bottom of the drain electrode 17 is formed in an area defined by the gate bus line 11-2 and the data bus line 16-2. A color filter 18 is formed so as to completely cover the pixel electrode 15. A protective layer 19 is formed on the color filter 18 and the TFT. A metal black matrix 20 of chrome or the like is formed on the protective layer 19 to completely cover the TFT, the gate bus line 11-2, and the data bus line 16-2. Here, the metal black matrix 20 is formed so as to be superposed on a portion of the pixel electrode in order to prevent light leakage.
In a liquid crystal display having the TFT array substrate shown in FIG. 1, the molecular orientation of liquid crystal is controlled by a voltage difference between the pixel electrode and the common electrode, and thus depends on a signal voltage applied to the pixel electrode and a common electrode voltage. Here, the area available for the pixel electrode is limited because the pixel electrode and the data bus line are formed on the same layer. This casts a limitation in expanding the aperture portion. Also, the black matrix overlaps the data bus line and the protective layer is formed in between. Thus, they together form a parasitic capacitance which causes various problems such as signal distortion, short, and crosstalk.